Project Information /mit/drkp/Private/6.111/blank/blank10K10.rpt MAX+plus II Compiler Report File Version 10.2 07/10/2002 Compiled: 09/30/2003 18:54:52 Copyright (C) 1988-2002 Altera Corporation Any megafunction design, and related net list (encrypted or decrypted), support information, device programming or simulation file, and any other associated documentation or information provided by Altera or a partner under Altera's Megafunction Partnership Program may be used only to program PLD devices (but not masked PLD devices) from Altera. Any other use of such megafunction design, net list, support information, device programming or simulation file, or any other related documentation or information is prohibited for any other purpose, including, but not limited to modification, reverse engineering, de-compiling, or use with any other silicon devices, unless such use is explicitly licensed under a separate agreement with Altera or a megafunction partner. Title to the intellectual property, including patents, copyrights, trademarks, trade secrets, or maskworks, embodied in any such megafunction design, net list, support information, device programming or simulation file, or any other related documentation or information provided by Altera or a megafunction partner, remains with Altera, the megafunction partner, or their respective licensors. No other licenses, including any licenses needed under any third party's intellectual property, are provided herein. ***** Project compilation was successful blank10k10 ** DEVICE SUMMARY ** Chip/ Input Output Bidir Memory Memory LCs POF Device Pins Pins Pins Bits % Utilized LCs % Utilized blank10K10 EPF10K10LC84-3 0 48 0 0 0 % 0 0 % User Pins: 0 48 0 Project Information /mit/drkp/Private/6.111/blank/blank10K10.rpt ** PROJECT COMPILATION MESSAGES ** Warning: TRI or OPNDRN buffer ':49' is permanently disabled Warning: TRI or OPNDRN buffer ':50' is permanently disabled Warning: TRI or OPNDRN buffer ':51' is permanently disabled Warning: TRI or OPNDRN buffer ':52' is permanently disabled Warning: TRI or OPNDRN buffer ':53' is permanently disabled Warning: TRI or OPNDRN buffer ':54' is permanently disabled Warning: TRI or OPNDRN buffer ':55' is permanently disabled Warning: TRI or OPNDRN buffer ':56' is permanently disabled Warning: TRI or OPNDRN buffer ':57' is permanently disabled Warning: TRI or OPNDRN buffer ':58' is permanently disabled Warning: TRI or OPNDRN buffer ':59' is permanently disabled Warning: TRI or OPNDRN buffer ':60' is permanently disabled Warning: TRI or OPNDRN buffer ':61' is permanently disabled Warning: TRI or OPNDRN buffer ':62' is permanently disabled Warning: TRI or OPNDRN buffer ':63' is permanently disabled Warning: TRI or OPNDRN buffer ':64' is permanently disabled Warning: TRI or OPNDRN buffer ':65' is permanently disabled Warning: TRI or OPNDRN buffer ':66' is permanently disabled Warning: TRI or OPNDRN buffer ':67' is permanently disabled Warning: TRI or OPNDRN buffer ':68' is permanently disabled Warning: TRI or OPNDRN buffer ':69' is permanently disabled Warning: TRI or OPNDRN buffer ':70' is permanently disabled Warning: TRI or OPNDRN buffer ':71' is permanently disabled Warning: TRI or OPNDRN buffer ':72' is permanently disabled Warning: TRI or OPNDRN buffer ':73' is permanently disabled Warning: TRI or OPNDRN buffer ':74' is permanently disabled Warning: TRI or OPNDRN buffer ':75' is permanently disabled Warning: TRI or OPNDRN buffer ':76' is permanently disabled Warning: TRI or OPNDRN buffer ':77' is permanently disabled Warning: TRI or OPNDRN buffer ':78' is permanently disabled Warning: TRI or OPNDRN buffer ':79' is permanently disabled Warning: TRI or OPNDRN buffer ':80' is permanently disabled Warning: TRI or OPNDRN buffer ':81' is permanently disabled Warning: TRI or OPNDRN buffer ':82' is permanently disabled Warning: TRI or OPNDRN buffer ':83' is permanently disabled Warning: TRI or OPNDRN buffer ':84' is permanently disabled Warning: TRI or OPNDRN buffer ':85' is permanently disabled Warning: TRI or OPNDRN buffer ':86' is permanently disabled Warning: TRI or OPNDRN buffer ':87' is permanently disabled Warning: TRI or OPNDRN buffer ':88' is permanently disabled Warning: TRI or OPNDRN buffer ':89' is permanently disabled Warning: TRI or OPNDRN buffer ':90' is permanently disabled Warning: TRI or OPNDRN buffer ':91' is permanently disabled Warning: TRI or OPNDRN buffer ':92' is permanently disabled Warning: TRI or OPNDRN buffer ':93' is permanently disabled Warning: TRI or OPNDRN buffer ':94' is permanently disabled Warning: TRI or OPNDRN buffer ':95' is permanently disabled Warning: TRI or OPNDRN buffer ':96' is permanently disabled Warning: TRI or OPNDRN buffer ':49' is permanently disabled Warning: TRI or OPNDRN buffer ':50' is permanently disabled Warning: TRI or OPNDRN buffer ':51' is permanently disabled Warning: TRI or OPNDRN buffer ':52' is permanently disabled Warning: TRI or OPNDRN buffer ':53' is permanently disabled Warning: TRI or OPNDRN buffer ':54' is permanently disabled Warning: TRI or OPNDRN buffer ':55' is permanently disabled Warning: TRI or OPNDRN buffer ':56' is permanently disabled Warning: TRI or OPNDRN buffer ':57' is permanently disabled Warning: TRI or OPNDRN buffer ':58' is permanently disabled Warning: TRI or OPNDRN buffer ':59' is permanently disabled Warning: TRI or OPNDRN buffer ':60' is permanently disabled Warning: TRI or OPNDRN buffer ':61' is permanently disabled Warning: TRI or OPNDRN buffer ':62' is permanently disabled Warning: TRI or OPNDRN buffer ':63' is permanently disabled Warning: TRI or OPNDRN buffer ':64' is permanently disabled Warning: TRI or OPNDRN buffer ':65' is permanently disabled Warning: TRI or OPNDRN buffer ':66' is permanently disabled Warning: TRI or OPNDRN buffer ':67' is permanently disabled Warning: TRI or OPNDRN buffer ':68' is permanently disabled Warning: TRI or OPNDRN buffer ':69' is permanently disabled Warning: TRI or OPNDRN buffer ':70' is permanently disabled Warning: TRI or OPNDRN buffer ':71' is permanently disabled Warning: TRI or OPNDRN buffer ':72' is permanently disabled Warning: TRI or OPNDRN buffer ':73' is permanently disabled Warning: TRI or OPNDRN buffer ':74' is permanently disabled Warning: TRI or OPNDRN buffer ':75' is permanently disabled Warning: TRI or OPNDRN buffer ':76' is permanently disabled Warning: TRI or OPNDRN buffer ':77' is permanently disabled Warning: TRI or OPNDRN buffer ':78' is permanently disabled Warning: TRI or OPNDRN buffer ':79' is permanently disabled Warning: TRI or OPNDRN buffer ':80' is permanently disabled Warning: TRI or OPNDRN buffer ':81' is permanently disabled Warning: TRI or OPNDRN buffer ':82' is permanently disabled Warning: TRI or OPNDRN buffer ':83' is permanently disabled Warning: TRI or OPNDRN buffer ':84' is permanently disabled Warning: TRI or OPNDRN buffer ':85' is permanently disabled Warning: TRI or OPNDRN buffer ':86' is permanently disabled Warning: TRI or OPNDRN buffer ':87' is permanently disabled Warning: TRI or OPNDRN buffer ':88' is permanently disabled Warning: TRI or OPNDRN buffer ':89' is permanently disabled Warning: TRI or OPNDRN buffer ':90' is permanently disabled Warning: TRI or OPNDRN buffer ':91' is permanently disabled Warning: TRI or OPNDRN buffer ':92' is permanently disabled Warning: TRI or OPNDRN buffer ':93' is permanently disabled Warning: TRI or OPNDRN buffer ':94' is permanently disabled Warning: TRI or OPNDRN buffer ':95' is permanently disabled Warning: TRI or OPNDRN buffer ':96' is permanently disabled Warning: Project has user pin or logic cell assignments, but has never been compiled before. For best fitting results, let the Compiler choose the first set of assignments instead. Project Information /mit/drkp/Private/6.111/blank/blank10K10.rpt ** PIN/LOCATION/CHIP ASSIGNMENTS ** Actual User Assignments Assignments (if different) Node Name blank10K10@5 connector0 blank10K10@6 connector1 blank10K10@7 connector2 blank10K10@8 connector3 blank10K10@9 connector4 blank10K10@10 connector5 blank10K10@11 connector6 blank10K10@65 connector7 blank10K10@66 connector8 blank10K10@67 connector9 blank10K10@70 connector10 blank10K10@71 connector11 blank10K10@72 connector12 blank10K10@78 connector13 blank10K10@79 connector14 blank10K10@80 connector15 blank10K10@81 connector16 blank10K10@16 nubus1 blank10K10@17 nubus2 blank10K10@18 nubus3 blank10K10@19 nubus4 blank10K10@21 nubus5 blank10K10@22 nubus6 blank10K10@23 nubus7 blank10K10@24 nubus8 blank10K10@25 nubus9 blank10K10@27 nubus10 blank10K10@28 nubus11 blank10K10@29 nubus12 blank10K10@30 nubus13 blank10K10@35 nubus14 blank10K10@36 nubus15 blank10K10@37 nubus16 blank10K10@38 nubus17 blank10K10@39 nubus18 blank10K10@47 nubus19 blank10K10@48 nubus20 blank10K10@49 nubus21 blank10K10@50 nubus22 blank10K10@51 nubus23 blank10K10@52 nubus24 blank10K10@53 nubus25 blank10K10@54 nubus26 blank10K10@58 nubus27 blank10K10@59 nubus28 blank10K10@60 nubus29 blank10K10@61 nubus30 blank10K10@62 nubus31 Device-Specific Information: /mit/drkp/Private/6.111/blank/blank10K10.rpt blank10K10 ***** Logic for device 'blank10K10' compiled without errors. Device: EPF10K10LC84-3 FLEX 10K Configuration Scheme: Passive Serial Device Options: User-Supplied Start-Up Clock = OFF Auto-Restart Configuration on Frame Error = OFF Release Clears Before Tri-States = OFF Enable Chip_Wide Reset = OFF Enable Chip-Wide Output Enable = OFF Enable INIT_DONE Output = OFF JTAG User Code = 7f Device-Specific Information: /mit/drkp/Private/6.111/blank/blank10K10.rpt blank10K10 ** ERROR SUMMARY ** Info: Chip 'blank10K10' in device 'EPF10K10LC84-3' has less than 20% of pins available for future logic changes -- if your project is likely to change, Altera recommends using a larger device c c c c c c c c c c c o o o o ^ o o o o o o o n n n n C n n n n n n n R R n n n n O n n n n n n n E E e e e e N e e e e e e e V S G G G S G c c c c F c c c c c c c C E N N N E N t t t t _ ^ t t t t t t t C R D D D R D o o o o # D n o o o o o o o I V I I I V I r r r r T O C r r r r r r r N E N N N E N 1 1 1 1 C N E 6 5 4 3 2 1 0 T D T T T D T 6 5 4 3 K E O -----------------------------------------------------------------_ / 11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75 | ^DATA0 | 12 74 | #TDO ^DCLK | 13 73 | RESERVED ^nCE | 14 72 | connector12 #TDI | 15 71 | connector11 nubus1 | 16 70 | connector10 nubus2 | 17 69 | RESERVED nubus3 | 18 68 | GNDINT nubus4 | 19 67 | connector9 VCCINT | 20 66 | connector8 nubus5 | 21 65 | connector7 nubus6 | 22 EPF10K10LC84-3 64 | RESERVED nubus7 | 23 63 | VCCINT nubus8 | 24 62 | nubus31 nubus9 | 25 61 | nubus30 GNDINT | 26 60 | nubus29 nubus10 | 27 59 | nubus28 nubus11 | 28 58 | nubus27 nubus12 | 29 57 | #TMS nubus13 | 30 56 | #TRST ^MSEL0 | 31 55 | ^nSTATUS ^MSEL1 | 32 54 | nubus26 |_ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 _| ------------------------------------------------------------------ V ^ n n n n n V G G G G V G n n n n n n n C n u u u u u C N N N N C N u u u u u u u C C b b b b b C D D D D C D b b b b b b b I O u u u u u I I I I I I I u u u u u u u N N s s s s s N N N N N N N s s s s s s s T F 1 1 1 1 1 T T T T T T T 1 2 2 2 2 2 2 I 4 5 6 7 8 9 0 1 2 3 4 5 G N.C. = No Connect. This pin has no internal connection to the device. VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts). VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts). GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND. GNDIO = Dedicated ground pin, which MUST be connected to GND. RESERVED = Unused I/O pin, which MUST be left unconnected. ^ = Dedicated configuration pin. + = Reserved configuration pin, which is tri-stated during user mode. * = Reserved configuration pin, which drives out in user mode. PDn = Power Down pin. @ = Special-purpose pin. # = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use. & = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration. JTAG pin stability prevents accidental loading of JTAG instructions. Device-Specific Information: /mit/drkp/Private/6.111/blank/blank10K10.rpt blank10K10 ** RESOURCE USAGE ** Logic Column Row Array Interconnect Interconnect Clears/ External Block Logic Cells Driven Driven Clocks Presets Interconnect Embedded Column Row Array Embedded Interconnect Interconnect Read/ External Block Cells Driven Driven Clocks Write Interconnect Total dedicated input pins used: 0/6 ( 0%) Total I/O pins used: 48/53 ( 90%) Total logic cells used: 0/576 ( 0%) Total embedded cells used: 0/24 ( 0%) Total EABs used: 0/3 ( 0%) Average fan-in: 0.00/4 ( 0%) Total fan-in: 0/2304 ( 0%) Total input pins required: 0 Total input I/O cell registers required: 0 Total output pins required: 48 Total output I/O cell registers required: 0 Total buried I/O cell registers required: 0 Total bidirectional pins required: 0 Total reserved pins required 0 Total logic cells required: 0 Total flipflops required: 0 Total packed registers required: 0 Total logic cells in carry chains: 0 Total number of carry chains: 0 Total logic cells in cascade chains: 0 Total number of cascade chains: 0 Total single-pin Clock Enables required: 0 Total single-pin Output Enables required: 0 Synthesized logic cells: 0/ 576 ( 0%) Logic Cell and Embedded Cell Counts Column: 01 02 03 04 05 06 07 08 09 10 11 12 EA 13 14 15 16 17 18 19 20 21 22 23 24 Total(LC/EC) A: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/0 B: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/0 C: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/0 Total: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/0 Device-Specific Information: /mit/drkp/Private/6.111/blank/blank10K10.rpt blank10K10 ** INPUTS ** Code: s = Synthesized pin or logic cell + = Synchronous flipflop / = Slow slew-rate output ! = NOT gate push-back r = Fitter-inserted logic cell @ = Uses single-pin Clock Enable & = Uses single-pin Output Enable None. Device-Specific Information: /mit/drkp/Private/6.111/blank/blank10K10.rpt blank10K10 ** OUTPUTS ** Fed By Fed By Fan-In Fan-Out Pin LC EC Row Col Primitive Code INP FBK OUT FBK Name 5 - - - 05 TRI 0 0 0 0 connector0 6 - - - 04 TRI 0 0 0 0 connector1 7 - - - 03 TRI 0 0 0 0 connector2 8 - - - 03 TRI 0 0 0 0 connector3 9 - - - 02 TRI 0 0 0 0 connector4 10 - - - 01 TRI 0 0 0 0 connector5 11 - - - 01 TRI 0 0 0 0 connector6 65 - - B -- TRI 0 0 0 0 connector7 66 - - B -- TRI 0 0 0 0 connector8 67 - - B -- TRI 0 0 0 0 connector9 70 - - A -- TRI 0 0 0 0 connector10 71 - - A -- TRI 0 0 0 0 connector11 72 - - A -- TRI 0 0 0 0 connector12 78 - - - 24 TRI 0 0 0 0 connector13 79 - - - 24 TRI 0 0 0 0 connector14 80 - - - 23 TRI 0 0 0 0 connector15 81 - - - 22 TRI 0 0 0 0 connector16 16 - - A -- TRI 0 0 0 0 nubus1 17 - - A -- TRI 0 0 0 0 nubus2 18 - - A -- TRI 0 0 0 0 nubus3 19 - - A -- TRI 0 0 0 0 nubus4 21 - - B -- TRI 0 0 0 0 nubus5 22 - - B -- TRI 0 0 0 0 nubus6 23 - - B -- TRI 0 0 0 0 nubus7 24 - - B -- TRI 0 0 0 0 nubus8 25 - - B -- TRI 0 0 0 0 nubus9 27 - - C -- TRI 0 0 0 0 nubus10 28 - - C -- TRI 0 0 0 0 nubus11 29 - - C -- TRI 0 0 0 0 nubus12 30 - - C -- TRI 0 0 0 0 nubus13 35 - - - 06 TRI 0 0 0 0 nubus14 36 - - - 07 TRI 0 0 0 0 nubus15 37 - - - 09 TRI 0 0 0 0 nubus16 38 - - - 10 TRI 0 0 0 0 nubus17 39 - - - 11 TRI 0 0 0 0 nubus18 47 - - - 14 TRI 0 0 0 0 nubus19 48 - - - 15 TRI 0 0 0 0 nubus20 49 - - - 16 TRI 0 0 0 0 nubus21 50 - - - 17 TRI 0 0 0 0 nubus22 51 - - - 18 TRI 0 0 0 0 nubus23 52 - - - 19 TRI 0 0 0 0 nubus24 53 - - - 20 TRI 0 0 0 0 nubus25 54 - - - 21 TRI 0 0 0 0 nubus26 58 - - C -- TRI 0 0 0 0 nubus27 59 - - C -- TRI 0 0 0 0 nubus28 60 - - C -- TRI 0 0 0 0 nubus29 61 - - C -- TRI 0 0 0 0 nubus30 62 - - C -- TRI 0 0 0 0 nubus31 Code: s = Synthesized pin or logic cell + = Synchronous flipflop / = Slow slew-rate output ! = NOT gate push-back r = Fitter-inserted logic cell @ = Uses single-pin Clock Enable & = Uses single-pin Output Enable Device-Specific Information: /mit/drkp/Private/6.111/blank/blank10K10.rpt blank10K10 ** FASTTRACK INTERCONNECT UTILIZATION ** Row FastTrack Interconnect: Global Left Half- Right Half- FastTrack FastTrack FastTrack Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins A: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 7/16( 43%) 0/16( 0%) B: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 8/16( 50%) 0/16( 0%) C: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 9/16( 56%) 0/16( 0%) Column FastTrack Interconnect: FastTrack Column Interconnect Input Pins Output Pins Bidir Pins 01: 0/24( 0%) 0/4( 0%) 2/4( 50%) 0/4( 0%) 02: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 03: 0/24( 0%) 0/4( 0%) 2/4( 50%) 0/4( 0%) 04: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 05: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 06: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 07: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%) 09: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 10: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 11: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%) 13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%) 14: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 15: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 16: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 17: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 18: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 19: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 20: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 21: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 22: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 23: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 24: 0/24( 0%) 0/4( 0%) 2/4( 50%) 0/4( 0%) EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%) Device-Specific Information: /mit/drkp/Private/6.111/blank/blank10K10.rpt blank10K10 ** EQUATIONS ** -- Node name is 'connector0' -- Equation name is 'connector0', type is output connector0 = TRI(GND, GND); -- Node name is 'connector1' -- Equation name is 'connector1', type is output connector1 = TRI(GND, GND); -- Node name is 'connector2' -- Equation name is 'connector2', type is output connector2 = TRI(GND, GND); -- Node name is 'connector3' -- Equation name is 'connector3', type is output connector3 = TRI(GND, GND); -- Node name is 'connector4' -- Equation name is 'connector4', type is output connector4 = TRI(GND, GND); -- Node name is 'connector5' -- Equation name is 'connector5', type is output connector5 = TRI(GND, GND); -- Node name is 'connector6' -- Equation name is 'connector6', type is output connector6 = TRI(GND, GND); -- Node name is 'connector7' -- Equation name is 'connector7', type is output connector7 = TRI(GND, GND); -- Node name is 'connector8' -- Equation name is 'connector8', type is output connector8 = TRI(GND, GND); -- Node name is 'connector9' -- Equation name is 'connector9', type is output connector9 = TRI(GND, GND); -- Node name is 'connector10' -- Equation name is 'connector10', type is output connector10 = TRI(GND, GND); -- Node name is 'connector11' -- Equation name is 'connector11', type is output connector11 = TRI(GND, GND); -- Node name is 'connector12' -- Equation name is 'connector12', type is output connector12 = TRI(GND, GND); -- Node name is 'connector13' -- Equation name is 'connector13', type is output connector13 = TRI(GND, GND); -- Node name is 'connector14' -- Equation name is 'connector14', type is output connector14 = TRI(GND, GND); -- Node name is 'connector15' -- Equation name is 'connector15', type is output connector15 = TRI(GND, GND); -- Node name is 'connector16' -- Equation name is 'connector16', type is output connector16 = TRI(GND, GND); -- Node name is 'nubus1' -- Equation name is 'nubus1', type is output nubus1 = TRI(GND, GND); -- Node name is 'nubus2' -- Equation name is 'nubus2', type is output nubus2 = TRI(GND, GND); -- Node name is 'nubus3' -- Equation name is 'nubus3', type is output nubus3 = TRI(GND, GND); -- Node name is 'nubus4' -- Equation name is 'nubus4', type is output nubus4 = TRI(GND, GND); -- Node name is 'nubus5' -- Equation name is 'nubus5', type is output nubus5 = TRI(GND, GND); -- Node name is 'nubus6' -- Equation name is 'nubus6', type is output nubus6 = TRI(GND, GND); -- Node name is 'nubus7' -- Equation name is 'nubus7', type is output nubus7 = TRI(GND, GND); -- Node name is 'nubus8' -- Equation name is 'nubus8', type is output nubus8 = TRI(GND, GND); -- Node name is 'nubus9' -- Equation name is 'nubus9', type is output nubus9 = TRI(GND, GND); -- Node name is 'nubus10' -- Equation name is 'nubus10', type is output nubus10 = TRI(GND, GND); -- Node name is 'nubus11' -- Equation name is 'nubus11', type is output nubus11 = TRI(GND, GND); -- Node name is 'nubus12' -- Equation name is 'nubus12', type is output nubus12 = TRI(GND, GND); -- Node name is 'nubus13' -- Equation name is 'nubus13', type is output nubus13 = TRI(GND, GND); -- Node name is 'nubus14' -- Equation name is 'nubus14', type is output nubus14 = TRI(GND, GND); -- Node name is 'nubus15' -- Equation name is 'nubus15', type is output nubus15 = TRI(GND, GND); -- Node name is 'nubus16' -- Equation name is 'nubus16', type is output nubus16 = TRI(GND, GND); -- Node name is 'nubus17' -- Equation name is 'nubus17', type is output nubus17 = TRI(GND, GND); -- Node name is 'nubus18' -- Equation name is 'nubus18', type is output nubus18 = TRI(GND, GND); -- Node name is 'nubus19' -- Equation name is 'nubus19', type is output nubus19 = TRI(GND, GND); -- Node name is 'nubus20' -- Equation name is 'nubus20', type is output nubus20 = TRI(GND, GND); -- Node name is 'nubus21' -- Equation name is 'nubus21', type is output nubus21 = TRI(GND, GND); -- Node name is 'nubus22' -- Equation name is 'nubus22', type is output nubus22 = TRI(GND, GND); -- Node name is 'nubus23' -- Equation name is 'nubus23', type is output nubus23 = TRI(GND, GND); -- Node name is 'nubus24' -- Equation name is 'nubus24', type is output nubus24 = TRI(GND, GND); -- Node name is 'nubus25' -- Equation name is 'nubus25', type is output nubus25 = TRI(GND, GND); -- Node name is 'nubus26' -- Equation name is 'nubus26', type is output nubus26 = TRI(GND, GND); -- Node name is 'nubus27' -- Equation name is 'nubus27', type is output nubus27 = TRI(GND, GND); -- Node name is 'nubus28' -- Equation name is 'nubus28', type is output nubus28 = TRI(GND, GND); -- Node name is 'nubus29' -- Equation name is 'nubus29', type is output nubus29 = TRI(GND, GND); -- Node name is 'nubus30' -- Equation name is 'nubus30', type is output nubus30 = TRI(GND, GND); -- Node name is 'nubus31' -- Equation name is 'nubus31', type is output nubus31 = TRI(GND, GND); Project Information /mit/drkp/Private/6.111/blank/blank10K10.rpt ** COMPILATION SETTINGS & TIMES ** Processing Menu Commands ------------------------ Design Doctor = off Logic Synthesis: Synthesis Type Used = Multi-Level Default Synthesis Style = NORMAL Logic option settings in 'NORMAL' style for 'FLEX10K' family CARRY_CHAIN = ignore CARRY_CHAIN_LENGTH = 32 CASCADE_CHAIN = ignore CASCADE_CHAIN_LENGTH = 2 DECOMPOSE_GATES = on DUPLICATE_LOGIC_EXTRACTION = on MINIMIZATION = full MULTI_LEVEL_FACTORING = on NOT_GATE_PUSH_BACK = on REDUCE_LOGIC = on REFACTORIZATION = on REGISTER_OPTIMIZATION = on RESYNTHESIZE_NETWORK = on SLOW_SLEW_RATE = off SUBFACTOR_EXTRACTION = on IGNORE_SOFT_BUFFERS = on USE_LPM_FOR_AHDL_OPERATORS = off Other logic synthesis settings: Automatic Global Clock = on Automatic Global Clear = on Automatic Global Preset = on Automatic Global Output Enable = on Automatic Fast I/O = off Automatic Register Packing = off Automatic Open-Drain Pins = on Automatic Implement in EAB = off Optimize = 5 Default Timing Specifications: None Cut All Bidir Feedback Timing Paths = on Cut All Clear & Preset Timing Paths = on Ignore Timing Assignments = off Functional SNF Extractor = off Linked SNF Extractor = off Timing SNF Extractor = on Optimize Timing SNF = off Generate AHDL TDO File = off Fitter Settings = NORMAL Use Quartus Fitter = on Smart Recompile = off Total Recompile = off Interfaces Menu Commands ------------------------ EDIF Netlist Writer = off Verilog Netlist Writer = off VHDL Netlist Writer = off Compilation Times ----------------- Compiler Netlist Extractor 00:00:00 Database Builder 00:00:00 Logic Synthesizer 00:00:02 Partitioner 00:00:00 Fitter 00:00:07 Timing SNF Extractor 00:00:00 Assembler 00:00:02 -------------------------- -------- Total Time 00:00:11 Memory Allocated ----------------- Peak memory allocated during compilation = 13,317K