-- tribuffer.vhd: one-signal tristate buffer
-- Dan R. K. Ports    <drkp@mit.edu>
-- 6.111 Lab 2, 2003/10/01

library ieee;
use ieee.std_logic_1164.all;

entity tribuffer is
  
  port (
    input  : in    std_logic;
    enable : in    std_logic;
    output : out   std_logic);

end tribuffer;

architecture behavioral of tribuffer is

begin  -- behavioral

  -- purpose: output input when enabled
  -- type   : combinational
  -- inputs : enable, input
  -- outputs: output
  process (enable, input)
  begin  -- process

    if enable = '1' then
      output <= input;
    else
      output <= 'Z';
    end if;
    
  end process;
 
                  
end behavioral;