digraph adcfsm {
	s_Idle [label="\N\n\nbusy = 0"];
	s_WaitForTimer;
	s_RAMRead [label="\N\n\nRAMAddr = count\nRAMWE = 0\nRAMReq = 1\nbuf = RAMData"];
	s_DACWrite [label="\N\n\nDACEnable = 0\nADBus=buf"];
	s_ADCEnable [label="\N\n\n/ADCEnable = 0\nADCRead = 0\n"];
	s_ADCWait [label="\N\n\n/ADCEnable = 0\nADCRead = 1"];
	s_ADCRead [label="\N\n\n/ADCEnable = 0\nADCRead = 1\nbuf = ADBus"];
	s_RAMWrite [label="\N\n\nRAMWE = 1\nRAMAddr = count\nRAMData = buf\nRAMReq = 1\n"];
	s_AddrInc [label="\N\n\ncount = count + 1"];
	s_RAMWrite2 [label="\N\n\nRAMWE = 1\nRAMAddr = count\nRAMData = 0\nRAMReq = 1\n"];
	s_AddrInc2 [label="\N\n\ncount = count + 1"];
	
	s_Idle -> s_WaitForTimer [label="start = 1"];
	s_WaitForTimer -> s_RAMRead [label="timerClk = 1"];
	s_RAMRead -> s_DACWrite [label="RAMDone = 1"];
	s_DACWrite -> s_ADCEnable [label="3 clock cycles"];
	s_ADCEnable -> s_ADCWait [label="ADCStatus = 1"];
	s_ADCWait -> s_ADCRead [label="ADCStatus = 0"];
	s_ADCRead -> s_RAMWrite;
	s_RAMWrite -> s_AddrInc [label="RAMDone = 1"];
	s_AddrInc -> s_RAMWrite2;
	s_RAMWrite2 -> s_AddrInc2 [label="RAMDone = 1"];
	s_AddrInc2 -> s_WaitForTimer [label="count != 0"];
	s_AddrInc2 -> s_Idle [label="count = 0"];
};